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CS5462
DIGITAL CHARACTERISTICS (Note 6)
Parameter
Symbol
Min
Typ
Max
Unit
High-Level Input Voltage
V IH
XIN
RESET
(VD+) - 0.5
0.8 ? VD+
-
-
-
-
V
V
Low-Level Input Voltage (VD = 5 V)
V IL
XIN
RESET
-
-
-
-
1.5
0.2 ? VD+
V
V
Low-Level Input Voltage (VD = 3.3 V)
V IL
XIN
RESET
-
-
-
-
0.3
0.2 ? VD+
V
V
High-Level Output Voltage (except XOUT)
Low-Level Output Voltage (except XOUT)
Input Leakage Current
Digital Output Pin Capacitance
I out = +5 mA
I out = -5 mA
V OH
V OL
I in
C out
(VD+) - 1.0
-
-
-
-
-
±1
5
-
0.4
±10
-
V
V
μA
pF
Drive Current FOUT, E1, E2, NEG, CPUCLK
Notes: 6. All measurements performed under static conditions.
SWITCHING CHARACTERISTICS
90
mA
Parameter
Symbol
Min
Typ
Max
Unit
Master Clock Frequency
Master Clock Duty Cycle
CPUCLK Duty Cycle
Rise Times
(Note 8)
Fall Times
(Note 8)
Internal Gate Oscillator
(Note 7)
Any Digital Input
Any Digital Output
Any Digital Input
Any Digital Output
MCLK
t rise
t fall
3
40
40
-
-
-
-
4.096
-
-
50
-
50
5
60
60
1.0
-
1.0
-
MHz
%
%
μs
ns
μs
ns
Start-up
Oscillator Start-Up Time
XTAL = 4.096 MHz (Note 9)
t ost
-
60
-
ms
7. If external MCLK is used, then the duty cycle must be between 45% and 55% to maintain this
specification.
8. Specified using 10% and 90% points on wave-form of interest. Output loaded with 50 pF.
9. Oscillator start-up time varies with crystal parameters. This specification does not apply when using an
external clock source.
DS547F1
7
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